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http://localhost:8080/xmlui/handle/123456789/3798Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Eshwar Gowd, G. | - |
| dc.contributor.author | Sekhar, P.C. | - |
| dc.contributor.author | Sreenivasarao, Dharmavarapu | - |
| dc.date.accessioned | 2026-01-07T09:46:13Z | - |
| dc.date.available | 2026-01-07T09:46:13Z | - |
| dc.date.issued | 2019 | - |
| dc.identifier.citation | 10.1109/JSYST.2018.2833867 | en_US |
| dc.identifier.uri | http://localhost:8080/xmlui/handle/123456789/3798 | - |
| dc.description | NITW | en_US |
| dc.description.abstract | The prominence of reduced switch count multilevel inverters is rising owing their merits of decreased number of switches and modular structures. There are topologies that use more than one source; however, utilization of all the sources at all levels is seldom. These topologies will diminish the energy effi ciencyoftheconversionsystemasallthesourceswillnotdeliverthe power except at the highest level in the output voltage. These kinds of converters can hamper the penetration of renewable energy into the existing energy mix, as the energy capacity of the renewable source is undermined. In this connection, this paper explores a three-phase multilevel inverter that can extract the power from all the sources at all the levels through series/parallel switchings. Besides, this paper develops a sliding mode based nonlinear con troller for closed-loop operation of the multilevel inverter, which is not addressed sufficiently in the literature. The performance of the developed variable gain nonlinear controller is validated against the PI controller for delivering desired powers under different op erating conditions/disturbances using simulations and in real-time environment. | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | IEEE Systems Journal | en_US |
| dc.subject | Closed-loop control | en_US |
| dc.subject | Multilevel inverters (MLIs) | en_US |
| dc.title | Real-time validation of a sliding mode controller for closed-loop operation of reduced switch count multilevel inverters | en_US |
| dc.type | Article | en_US |
| Appears in Collections: | Electrical Engineering | |
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