Please use this identifier to cite or link to this item: http://localhost:8080/xmlui/handle/123456789/3762
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dc.contributor.authorTirupathi, Abhilash-
dc.contributor.authorAnnamalai, Kirubakaran-
dc.contributor.authorVeeramraju Tirumala, Somasekhar-
dc.date.accessioned2026-01-01T05:50:21Z-
dc.date.available2026-01-01T05:50:21Z-
dc.date.issued2019-
dc.identifier.citation10.1002/2050-7038.12139en_US
dc.identifier.urihttp://localhost:8080/xmlui/handle/123456789/3762-
dc.descriptionNITWen_US
dc.description.abstractMultilevel inverters (MLIs) with reduced part count are becoming popular in the arena of medium voltage and medium power applications. This proposed topol ogy owns the advantages of reduced number and voltage stress across the switching devices and higher efficiency. It also combines the method of utilizing full DC‐link voltage to improve the RMS output voltage. The proposed hybrid topology is constructed using three different sections consisting of a cascaded two two‐level inverter, H‐bridge with a flying capacitor, and single‐leg low frequency circuit. The complete modes of operation to generate 9‐level A. C voltage at the inverter output including the FC voltage balancing has been com prehensively presented. A comparison is constructed with the proposed and recent topologies in the literature to show the merits of the proposed configura tion. The proposed topology is tested in MATLAB/SIMULINK environment and a scale‐down prototype has been developed in the laboratory. The feasibility of the proposed topology is verified through simulation and experimental results.en_US
dc.language.isoenen_US
dc.publisherInternational Transactions on Electrical Energy Systemsen_US
dc.subjectBridge circuitsen_US
dc.subjectEfficiencyen_US
dc.titleA new hybrid flying capacitor“based single-phase nine-level inverteren_US
dc.typeArticleen_US
Appears in Collections:Electrical Engineering

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