Please use this identifier to cite or link to this item: http://localhost:8080/xmlui/handle/123456789/3755
Title: FPGA-based implementation of single-phase seven-level quasi-Z-source inverter
Authors: Rahul, Jammy Ramesh
Annamalai, Kirubakaran
Keywords: Electric impedance measurement
Field programmable gate arrays (FPGA)
Issue Date: 2019
Publisher: International Journal of Circuit Theory and Applications
Citation: 10.1002/cta.2709
Abstract: In this paper, a new single‐phase seven‐level quasi‐Z‐source (qZs) inverter with reduced switch count for multistring photovoltaic applications is proposed, which is capable of supplying both direct current (dc) and alternating current (ac) loads simultaneously. The proposed configuration is derived from a combi nation of qZs networks and asymmetrical seven‐level inverter. The front‐end qZs converter boosts the input voltage obtained from the dc sources to the desired value, whereas the asymmetrical seven‐level inverter performs dc‐ac conversion with reduced switch count and provides better efficiency. The steady‐state performance of the model is evaluated in both continuous conduc tion mode (CCM) and discontinuous conduction mode (DCM) of operation. In addition, the dynamic performance of the model is tested for the load as well as input voltage changes. A simple proportional‐integral (PI) controller is imple mented in FPGA Spartan‐6 Processor using Xilinx system generator blocks. An experimental prototype is also developed to validate the feasibility of the proposed topology. Finally, a brief comparative assessment is formulated with other topologies to show the merits of the proposed structure
Description: NITW
URI: http://localhost:8080/xmlui/handle/123456789/3755
Appears in Collections:Electrical Engineering

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