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http://localhost:8080/xmlui/handle/123456789/3719Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Vemuganti, Hari Priya | - |
| dc.contributor.author | Sreenivasarao, Dharmavarapu | - |
| dc.contributor.author | Siva Kumar, Ganjikunta | - |
| dc.date.accessioned | 2025-12-23T07:03:11Z | - |
| dc.date.available | 2025-12-23T07:03:11Z | - |
| dc.date.issued | 2021 | - |
| dc.identifier.citation | 10.1080/00207217.2020.1870733 | en_US |
| dc.identifier.uri | http://localhost:8080/xmlui/handle/123456789/3719 | - |
| dc.description | NITW | en_US |
| dc.description.abstract | Among the various reduced switch count multilevel inverter (RSC- MLI) topologies, T-type is the simplified configuration with appreci able reduction in switch count and, posses an ability to serve an alternative to cascaded H-bridge (CHB) MLI. However, extreme reduction in switch count of T-type topology has limited its switch ing redundancies and created critical dc-link voltage balancing issues in closed-loop applications. In addition, conventional multi- reference PWM scheme reported for T-type produces poor line- voltage total harmonic distortion (THD). Therefore, in this paper, a f ive-level T-type topology is presented, which involves only one- third dc source requirement of conventional T-type and CHB. This will greatly reduce the dc-link voltage balancing issues and cost. Further, to improve the harmonic performance of conventional multi-reference PWM, a simple carrier-based modulation scheme is proposed. The open and closed performance on the proposed scheme is validated on Simulink and experimental environment considering five-level T-type configuration. To evaluate the dynamic performance of developed T-type configuration, a three- phase three-wire (3P3W) distributed static compensator (DSTATCOM) application is considered, where its ability to eliminate source current harmonics, reactive power and load unbalance is investigated. To promote the superiority of the developed T-type topology, its cost comparison with conventional T-type and CHB is presented. | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | International Journal of Electronics | en_US |
| dc.subject | Bridge circuits | en_US |
| dc.subject | Harmonic analysis | en_US |
| dc.title | A three-phase transformer based T-type topology for DSTATCOM application | en_US |
| dc.type | Article | en_US |
| Appears in Collections: | Electrical Engineering | |
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