Exploring Design of Physical Unclonable Functions (PUFs) for Robust Hardware-Assisted Security

Abstract

Physical unclonable function (PUF) is a promising hardware that augments the security feature for Integrated Circuit (IC) identification and authentication. It is one of the reliable solutions to many security threats as it facilitates die-unique identifier features by increasing uncertainty and prediction. PUF technology, especially for compact IoT enabled devices, makes use of inherent Process Variations (PVs) of ICs attained by chip manufacturers and transforms them into distinctive digital keys to offer a possible solution to security-related issues. Fascinatingly, Machine Learning (ML) is a relatively prominent and inexpensive method that is frequently employed to tackle PUFs. As a result of the PUF’s instability due to environmental changes, additional circuits are now being explored to fix the threats that ensue. In this thesis, we discuss different facets of PUF design with a strong emphasis on the circuit details. From basic PUF designs presented by the researchers, the ultimate design challenges are identified, and prominent solutions are offered that should satisfy the PUF evaluation metrics before contrasting different PUF core implementations. Con cerning the detailed literature, we proposed an XoR Feed Arbiter PUF (XFAPUF) that minimizes vulnerabilities by introducing more complexity in the arbitration process using a relatively smaller number of challenges against conventional Arbiter PUF (APUF). It offers better uniqueness and reliability than prior works as it achieves promising results, such as uniqueness of 50.03%, diffuseness of 49.52%, and worst-case reliability of 99.81% that ranges from 10◦C to 80◦C, with 10% fluctuations in supply voltage (VDD). In ad dition, an enhancement in reliability is achieved by a chaotic-based challenge generation mechanism introduced for feeding APUFs to increase the non-linearity in the arbitration process. Subsequently, an automated challenge-feeding mechanism by Recursive Challenge Abstract viii Feed Arbiter Physical Unclonable Function (RC-FAPUF) is proposed to generate unique, unpredictable, and reliable keys that are independent of the challenges that are gener ally fed by the user. The robustness of the keys is measured by an average reliability of 99.91% and also validated through a lower prediction accuracy of 48% and 52.7% with Linear Regression (LR), and ML classifiers respectively. Furthermore, to power up suit able IoT sub-systems or sensors, a Relaxation Oscillator PUF (ReOPUF) is designed to generate a 4.4MHz frequency along with key generation. The reliability of ReOPUF re sponses has been improved from 95.33% for the conventional Ring Oscillator (RO) PUF to 99.19%. Besides, a Schmitt-Trigger (ST) based APUF instance is introduced that uses PVs in Hysteresis Width (HW) to attain the non-linearity in the Challenge Response Pair (CRP) mechanism. Thereby, impersonation of the responses (keys) is complex perhaps various trials are performed to predict the keys. It offers reliability while achieving 0.15%, and 0.31% Bit Error Rate (BER) concerning the variations in temperature and VDD re spectively. Finally, the proposed PUF designs are implemented in UMC180nm CMOS technology that is suitable for prominent security assistance to IoT-enabled devices and is more resilient against ML attacks