Design and evaluation of scalable 2D, 3D and hybrid interconnects for Network-on-Chip

Abstract

Network-on-Chip (NoC) is an emerging and efficient on-chip interconnect technology. NoC is a viable option to design modular, scalable, robust communication interconnect architectures. Topology is one among many crucial design aspects of NoC, as it affects the performance of the interconnection network. Mesh is the most extensively used and favoured architecture for implementing less sophisticated SoCs due to its simple, scalable, regular structure, low-radix routers and short-range links. However, as the network scales, Mesh suffers from degraded performance because of large diameter. The present work aims at developing efficient and scalable novel topologies– 2D, 3D topology, hybrid wired topology and hybrid wired-wireless topology for on-chip interconnect architectures that outperform Mesh topology. The objectives of the research are threefold– First, to design a hybrid wired topol ogy i.e., combining two topologies. Second, to design a diagonal Mesh based topology by inserting diagonal links into the conventional Mesh topology retaining the simple, scalable, regular structure of Mesh simultaneously improving the performance. Third, to design a three-level hierarchical hybrid wired-wireless interconnection architecture for large networks. To begin, the present work proposes a novel, scalable, hybrid Hexagonal Star (HS) topology for on-chip connectivity networks. The proposed topology’s properties have been investigated and compared to those of the Mesh, Torus, and Honeycomb Mesh topologies. The performance of the Hexagonal Star topology has been studied and compared to that of the Mesh topology in different scenarios. The comparative studies of topological properties have indicated that the proposed topology can be a potential choice for on-chip interconnection networks. For different traffic patterns and traffic loads, HS topology has registered a reduction of packet latency ranging from 15% to 50% and from 9% to 23% for Abstract vii 18 nodes and 32 nodes, respectively, compared to Mesh topology. Further, the synthesis results indicate a significant reduction of area consumed by HS topology compared to the area consumed by an identically configured Mesh topology. Second, the present work proposes DiamondMesh, an area and energy efficient diag onal mesh based topology. By incorporating diagonal links into the basic mesh topology, the proposed DiamondMesh increases network performance while keeping the Mesh topol ogy’s regular, simple, and scalable features. Topological properties of DiamondMesh have been explored and compared with that of other competitive diagonal mesh topologies. The proposed topology and other state-of-the-art diagonal Mesh topologies have been simulated and synthesised. The evaluation results indicate that there has been a signifi cant reduction of latency compared to Mesh and other diagonal mesh topologies except DMesh and a considerable reduction of area and power compared to the DMesh topology. Finally, in order to address the limitations of electrical interconnects, the current work investigated hybrid wired-wireless topologies. Three-level hierarchical hybrid wired wireless Network-on-Chip (NoC) designs have been proposed and evaluated under differ ent traffic patterns at low, medium, and high traffic loads. In the proposed three-level hierarchy, the bottom and top levels are concerned with subnet topology and wireless hub topology, respectively. The present research introduces a middle level that investigates the number of nodes that will be connected to a subnet’s wireless hub. Mesh and fully connected wireless topologies have been chosen for the bottom and top levels of the hi erarchy, respectively. Different hybrid wired-wireless configurations have been developed and studied by varying the number of subnets and the number of nodes to be attached to the subnet at the middle level. The objective of investigating the middle level is to reduce the number of subnets and, consequently, the number of wireless nodes in large network architectures without compromising performance. The proposed hybrid archi tectures outperform baseline wired Mesh architecture in terms of latency and throughput characteristics.