DESIGN AND ANALYSIS OF MULTILAYER ON-CHIP INDUCTORS FOR RF APPLICATIONS

Abstract

Recent advances in wireless communication necessitate the development of high performance, cost-effective, and miniaturized wireless devices with low power consumption. Integrated inductors are among the fundamental passive elements employed in the design of Radio Frequency Integrated Circuits (RFICs) and Monolithic Microwave Integrated Circuits (MMICs). These inductors are crucial for implementing various circuits such as Voltage Con trolled Oscillators (VCOs), Low Noise Amplifiers (LNAs), impedance matching networks, fil ters, and power amplifiers. However, integrating these passive components into wireless devices presents several challenges, including design complexity, achieving a high-quality factor, min imizing on-chip area, and reduction of cost. This thesis addresses some of these challenges by focusing on the design and optimization of integrated on chip inductors. The design of pas sive components like inductors typically involves the use of electromagnetic (EM) simulators to predict performance metrics. Achieving the optimal performance requires balancing various trade-offs between the cost of the chosen technology and the specific application requirements. One effective approach to enhancing the performance of passive components is the use of spiral geometry. Spiral inductors have been shown to significantly improve the performance char acteristics due to their efficient use of space and the ability to achieve high inductance values in a compact form. Here, the spiral geometry is adopted to reduce the footprint of passive components while maintaining or improving their performance metrics. In this thesis, various inductors including planar inductors, half-turn split inductors, pyra mid inductors, coupled pyramid inductors and multilayer inductors, have been proposed and designed to address performance limitations in RF applications. The performance of these inductors, particularly the quality factor, inductance, and self-resonant frequency, is often re stricted by parasitic capacitance, current crowding, and proximity effects. To mitigate these issues and to enhance the quality factor, pyramid coupled pyramid and multilayer inductors are proposed. The pyramid inductor design offers improved inductance while optimizing the use of on-chip space. The coupled pyramid inductor achieves an optimal balance between in ductance, quality factor, and area efficiency, making it highly suitable for RF applications. To further enhance the performance and improve quality factor within small area multilayer induc tor is proposed. In this design each conductor turn is split into two different layers to reduce the overall capacitance, thereby improving the quality factor. Single-layer planar inductors, while straightforward to design, tend to suffer from poor quality factor and inductance. This is primarily due to all the metal tracks being at an equal potential, which exacerbates the ca pacitance effect. To overcome these drawbacks, a multilayer inductor design is proposed. By vi stacking multiple layers, the parasitic capacitance is significantly reduced, and the inductance is increased. The careful selection of the width and spacing of the metal strips across the four layers helps minimize resistive losses, eddy currents, and the current crowding effect. Mathematical validation of inductors is crucial for theoretically justifying their induc tance values. Traditional frequency-independent analytical expressions often exhibit signifi cant deviations when extracting inductance values at frequencies beyond 2 GHz. To address this limitation, this dissertation proposes a frequency-dependent inductance extraction method. This approach incorporates basic Maxwell’s equations and magnetic flux expressions to pro vide more accurate inductance values across a wider frequency range. The Grover concept and Greenhouse method are implemented to evaluate the self-inductance and mutual inductance of spiral inductors. These methods offer a systematic way to account for the complex interactions within the inductor structure. The integral equations derived from these methods are solved using partial integral techniques, which help in precisely calculating the inductance values. For three-dimensional and multilayer inductors, this advanced methodology significantly reduces the error margin. The maximum percentage of error found for these inductors is between 3 4%, demonstrating the effectiveness of this approach. By using frequency-dependent methods, the dissertation ensures that the inductance values are more accurate and reliable, especially at higher frequencies where traditional methods fall short. Further, a Voltage-Controlled Oscillator (VCO) is designed utilizing the proposed cou pled pyramid inductor and multilayer inductor. VCOs are crucial components in telemetry and transponder applications due to their capacity to generate precise and tuneable frequencies, which are essential for maintaining accurate and reliable communication channels. The VCO is constructed using the Clapp configuration, a design particularly well-suited for high-frequency applications due to its ability to provide stable oscillations and excellent frequency tuning capa bilities. The performance characteristics of the VCO, such as phase noise, output power, Figure of Merit (FoM), and overall output power, were measured by incorporating both the coupled pyramid inductor and multilayer inductor. Phase noise, a critical parameter in VCO perfor mance, impacts the signal purity and is essential for applications requiring high signal integrity. TheFoM,whichcombinesmultipleperformance metrics into a single value, provides a compre hensive measure of the oscillator’s efficiency and effectiveness. Simulation results demonstrate that the multilayer inductor significantly outperforms the coupled pyramid inductor in several key aspects. The multilayer inductor achieves a better FoM, indicating a more efficient and high-performing VCO design. Additionally, it provides superior output power and improved phase noise characteristics compared to the coupled pyramid inductor. These enhancements vii are attributed to the multilayer inductor’s optimized structure, which minimizes parasitic effects and maximizes inductance and quality factor. The LowNoise Amplifier (LNA) is a crucial component in wireless receivers, tasked with amplifying incoming signals from the antenna while preserving a high signal-to-noise ratio (SNR). In this, LNAs have been designed using the proposed coupled pyramid and multilayer inductors, each contributing uniquely to the performance of the amplifier. Designing an effec tive LNA requires balancing several performance metrics, including gain, linearity, noise figure, input matching, and power consumption. These metrics often involve trade-offs; improving one aspect can sometimes lead to compromises in another. The results of indicate that while the gain of the LNA remains almost the same whether using the coupled pyramid inductor or the multi layer inductor, the noise figure is significantly improved when the multilayer inductor is used. Specifically, the noise figure is improved by 64.2% in the LNA incorporating the multilayer inductor compared to the one using the coupled pyramid inductor. This dramatic improvement in the noise figure is particularly advantageous for applications requiring high signal integrity and low noise levels. The multilayer inductor’s superior performance in reducing the noise fig ure highlights its value in the development of advanced communication systems, especially in the high-demand environment of 5G networks. The enhanced noise performance of the LNA with the multilayer inductor makes it an excellent candidate for such applications, ensuring that signals are amplified with minimal added noise, thereby preserving the quality and reliability of communication.