A Fully On Chip Slewrate Enhanced Low Drop-out Voltage Regulator

Abstract

A novel full on-chip low dropout linear regulator is presented in this paper. This LDO is designed with single ended OTA for better gain which in order improves load regulation. A self-biased comparator is used to detect the change in regulated voltage and increase slew rate at output of error amplifier. A frequency compensation scheme is used which maintains LDO stable over entire load current range i.e. 0-100mA. The load regulation of the LDO is 0.68 μv/mA .The overshoot/ undershoots in the output voltage under the extreme load transients are 120mV/165mV respectively. The settling time is only 750nS. The LDO presented requires a bias current of 50μA and 200mV dropout voltage and is designed with UMC 130mmrf technology. The LDO presented is useful analog application such as baseband of receiver where high load regulation is necessary for robust application.