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dc.contributor.authorDwibedy, Debasish-
dc.contributor.authorAlapati, Suresh-
dc.contributor.authorPatri, Sreeharirao-
dc.contributor.authorKsr, Krishnaprasad-
dc.date.accessioned2025-01-08T09:25:24Z-
dc.date.available2025-01-08T09:25:24Z-
dc.date.issued2015-
dc.identifier.citation10.1109/TENCON.2014.7022398en_US
dc.identifier.urihttp://localhost:8080/xmlui/handle/123456789/2582-
dc.descriptionNITWen_US
dc.description.abstractA novel full on-chip low dropout linear regulator is presented in this paper. This LDO is designed with a double recycling folded cascode error amplifier that offers very good stability. A refined frequency compensation scheme is used which maintains LDO stable over entire load current range i.e. 0-100mA and results a fast transient response. The overshoot/ undershoot in the output voltage under the extreme load transients are 49.7mV/98.65mV respectively. The settling time is only 500nS. A double recycled folded cascode is used to improve gain, and slew rate by recycling the shunt current sources of conventional folded cascode amplifier without increasing area. The LDO presented requires a bias current of 68μA and 200mV dropout voltage and is designed in 180nm technology. The LDO presented is useful for Digital integrated circuit where low transient is necessary for robust applicationen_US
dc.language.isoenen_US
dc.publisherIEEE Region 10 Annual International Conference, Proceedings/TENCONen_US
dc.subjectHigh slew rateen_US
dc.subjectlow-quiescent currenten_US
dc.titleFully on Chip Low Dropout (LDO) Voltage Regulator with Improved Transient Responseen_US
dc.typeOtheren_US
Appears in Collections:Electronics and Communication Engineering

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