Please use this identifier to cite or link to this item: http://localhost:8080/xmlui/handle/123456789/2582
Title: Fully on Chip Low Dropout (LDO) Voltage Regulator with Improved Transient Response
Authors: Dwibedy, Debasish
Alapati, Suresh
Patri, Sreeharirao
Ksr, Krishnaprasad
Keywords: High slew rate
low-quiescent current
Issue Date: 2015
Publisher: IEEE Region 10 Annual International Conference, Proceedings/TENCON
Citation: 10.1109/TENCON.2014.7022398
Abstract: A novel full on-chip low dropout linear regulator is presented in this paper. This LDO is designed with a double recycling folded cascode error amplifier that offers very good stability. A refined frequency compensation scheme is used which maintains LDO stable over entire load current range i.e. 0-100mA and results a fast transient response. The overshoot/ undershoot in the output voltage under the extreme load transients are 49.7mV/98.65mV respectively. The settling time is only 500nS. A double recycled folded cascode is used to improve gain, and slew rate by recycling the shunt current sources of conventional folded cascode amplifier without increasing area. The LDO presented requires a bias current of 68μA and 200mV dropout voltage and is designed in 180nm technology. The LDO presented is useful for Digital integrated circuit where low transient is necessary for robust application
Description: NITW
URI: http://localhost:8080/xmlui/handle/123456789/2582
Appears in Collections:Electronics and Communication Engineering

Files in This Item:
File Description SizeFormat 
Fully_on_chip_low_dropout_LDO_voltage_regulator_with_improved_transient_response.pdf1.04 MBAdobe PDFView/Open


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.