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dc.contributor.authorKeerti Kumar, K.-
dc.contributor.authorBheema Rao, N.-
dc.date.accessioned2025-01-08T06:35:48Z-
dc.date.available2025-01-08T06:35:48Z-
dc.date.issued2012-03-
dc.identifier.citation10.1109/ICDCSyst.2012.6188765en_US
dc.identifier.urihttp://localhost:8080/xmlui/handle/123456789/2565-
dc.descriptionNITWen_US
dc.description.abstractScaling down in the MOSFET technology has been the important factor for continuous advancement in the semiconductor industry. As the technology scaling is entering the nanometer regime, one of the prominent features which come into the scenario are the short-channel effects (SCEs). Because of the SCEs, subthreshold leakage current has been the serious problem being faced by the scaled devices. At the device level, channel engineering and the threshold voltage lowering are the methods which were followed to control the subthreshold leakage current. In this paper, a new MOSFET device based on the variation of the gate oxide thickness to lower the subthreshold leakage current has been proposed. The TCAD (Technology Computer Aided Design) simulation results show the reduction of the subthreshold leakage current.en_US
dc.language.isoenen_US
dc.publisher2012 International Conference on Devices, Circuits and Systems (ICDCS)en_US
dc.subjectLogic gatesen_US
dc.subjectMOSFET circuitsen_US
dc.subjectLeaden_US
dc.subjectCMOS technologyen_US
dc.titleVariable gate oxide thickness MOSFET: A device level solution for sub-threshold leakage current reductionen_US
dc.typeOtheren_US
Appears in Collections:Electronics and Communication Engineering



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