1. Dspace@NITW
  2. Conference Papers
  3. Electronics and Communication Engineering
Please use this identifier to cite or link to this item: http://localhost:8080/xmlui/handle/123456789/2407
Full metadata record
DC FieldValueLanguage
dc.contributor.authorParihar, Kunal-
dc.contributor.authorM, Venkatesh-
dc.contributor.authorPatel, Ravikumar-
dc.date.accessioned2025-01-03T09:35:41Z-
dc.date.available2025-01-03T09:35:41Z-
dc.date.issued2015-
dc.identifier.citation10.1109/ISVDAT.2015.7208072en_US
dc.identifier.urihttp://localhost:8080/xmlui/handle/123456789/2407-
dc.descriptionNITWen_US
dc.language.isoenen_US
dc.publisher19th International Symposium on VLSI Design and Test, VDAT 2015 - Proceedingsen_US
dc.subjectSDFen_US
dc.subjectCoverageen_US
dc.titleRealistic dynamic timing verification for complex mixed signal hard macro's using UVMen_US
dc.typeOtheren_US
Appears in Collections:Electronics and Communication Engineering

Files in This Item:
File Description SizeFormat 
Realistic_dynamic_timing_verification_for_complex_mixed_signal_hard_macros_using_UVM.pdf158.52 kBAdobe PDFView/Open
Show simple item record


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.