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Please use this identifier to cite or link to this item: http://localhost:8080/xmlui/handle/123456789/2407
Title: Realistic dynamic timing verification for complex mixed signal hard macro's using UVM
Authors: Parihar, Kunal
M, Venkatesh
Patel, Ravikumar
Keywords: SDF
Coverage
Issue Date: 2015
Publisher: 19th International Symposium on VLSI Design and Test, VDAT 2015 - Proceedings
Citation: 10.1109/ISVDAT.2015.7208072
Description: NITW
URI: http://localhost:8080/xmlui/handle/123456789/2407
Appears in Collections:Electronics and Communication Engineering

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