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http://localhost:8080/xmlui/handle/123456789/2379| Title: | A 10-bit 25MSPS Low Power Pipeline ADC for Mobile HDTV Receiver System |
| Authors: | Dongre, Krushna Akre, Pratik Kamdi, Rahul Sarangam, K. |
| Keywords: | HDTV Receiver, Low power |
| Issue Date: | 2014 |
| Publisher: | 2014 International Conference on Electronics and Communication Systems, ICECS 2014 |
| Citation: | 10.1109/ECS.2014.6892549 |
| Abstract: | This paper describes a 10-bit 25MSPS analog-to-digital converter (ADC) for Mobile HDTV Receiver System. The ADC is based on a 4-3-3 bits- per-stage pipeline architecture and The proposed pipelined ADC adopts a optimized stage resolution based on power consumption of sample and hold circuit and comparator. At the target sampling rate of 25MS/s, measured results show that the converter consumes 12.36mW from a 1.8V power supply and 56dB SNR and 60dB SFDR. |
| Description: | NITW |
| URI: | http://localhost:8080/xmlui/handle/123456789/2379 |
| Appears in Collections: | Electronics and Communication Engineering |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| A 10-bit 25MSPS low power pipeline ADC for Mobile HDTV Receiver System.pdf | 1.6 MB | Adobe PDF | View/Open |
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