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dc.contributor.authorPridhiviraj, P-
dc.contributor.authorKrishna, G-
dc.contributor.authorJatoth, Ravi Kumar-
dc.date.accessioned2025-01-02T09:27:59Z-
dc.date.available2025-01-02T09:27:59Z-
dc.date.issued2014-
dc.identifier.citation10.1109/RAECS.2014.6799568en_US
dc.identifier.urihttp://localhost:8080/xmlui/handle/123456789/2350-
dc.descriptionNITWen_US
dc.description.abstractMultipliers & dividers provide two basic operations essential in analog computers and also have many applications in fuzzy-control, instrumentation, analog signal processing, automatic gain control, frequency translation and etc. This paper is intended to implement voltage multiplier & divider using compensated log and antilog amplifiers. Here we discuss about the design of log & antilog amplifiers and problems involved in the log & antilog amplifiers and various causes that may affect the performance of log & antilog amplifiers. Finally different types of compensation techniques for the log & antilog amplifiers are discussed. With that we have designed the voltage multipliers & dividers, and simulation results of analog signal multiplication and division are plotted using NI Multisim 11.0.1en_US
dc.language.isoenen_US
dc.publisher2014 Recent Advances in Engineering and Computational Sciences, RAECS 2014en_US
dc.subjectcompensated log and antilog amplifiers;en_US
dc.subjectvoltage multiplier and divideren_US
dc.titleImplementation issues of Voltage Multiplier and Divider using Log and Antilog amplifiersen_US
dc.typeOtheren_US
Appears in Collections:Electronics and Communication Engineering

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