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Title: | Implementation issues of Voltage Multiplier and Divider using Log and Antilog amplifiers |
Authors: | Pridhiviraj, P Krishna, G Jatoth, Ravi Kumar |
Keywords: | compensated log and antilog amplifiers; voltage multiplier and divider |
Issue Date: | 2014 |
Publisher: | 2014 Recent Advances in Engineering and Computational Sciences, RAECS 2014 |
Citation: | 10.1109/RAECS.2014.6799568 |
Abstract: | Multipliers & dividers provide two basic operations essential in analog computers and also have many applications in fuzzy-control, instrumentation, analog signal processing, automatic gain control, frequency translation and etc. This paper is intended to implement voltage multiplier & divider using compensated log and antilog amplifiers. Here we discuss about the design of log & antilog amplifiers and problems involved in the log & antilog amplifiers and various causes that may affect the performance of log & antilog amplifiers. Finally different types of compensation techniques for the log & antilog amplifiers are discussed. With that we have designed the voltage multipliers & dividers, and simulation results of analog signal multiplication and division are plotted using NI Multisim 11.0.1 |
Description: | NITW |
URI: | http://localhost:8080/xmlui/handle/123456789/2350 |
Appears in Collections: | Electronics and Communication Engineering |
Files in This Item:
File | Description | Size | Format | |
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Implementation_issues_of_voltage_multiplier_and_divider_using_log_and_antilog_amplifiers.pdf | 381.92 kB | Adobe PDF | View/Open |
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