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http://localhost:8080/xmlui/handle/123456789/2156| Title: | C-based predictor for scoreboard in Universal Verification Methodology |
| Authors: | Konale, Srikanth Rao, N. Bheema |
| Keywords: | Predictor UVM System Verilog Testbench Functional Verification |
| Issue Date: | 2014 |
| Publisher: | 2014 International Conference on Advances in Engineering and Technology Research, ICAETR 2014 |
| Citation: | 10.1109/ICAETR.2014.7012913 |
| Abstract: | Universal Verification Methodology (UVM) is a standardized hybrid methodology for verifying complex integrated circuit designs in the semiconductor industry. Predictor is a component in UVM based test bench that represents a golden model of the design under test (DUT), which generates an expected response against which the actual response of the DUT is compared in scoreboard. Predictors are mostly written in C or C++ for modelling the correct functionality of the DUT. It is provided in the form of compiled object code to the testbench and acts as a verification component. UVM uses SystemVerilog Direct Programming Interface (DPI) for communicating components written in C with other components of the test bench. This paper describes implementation of a UVM testbench consisting of a C based predictor, in the form of a complied object code for verification of a fused floating-point add-subtract design unit. |
| Description: | NITW |
| URI: | http://localhost:8080/xmlui/handle/123456789/2156 |
| Appears in Collections: | Electronics and Communication Engineering |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| C-based predictor for scoreboard in Universal Verification Methodology.pdf | 509.42 kB | Adobe PDF | View/Open |
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