FPGA implementation of Itoh-Tsujii inversion algorithm

Abstract

Elliptic Curve Cryptography (ECC) has been gaining popularity due to its shorter key size requirements. It uses arithmetic operations including addition, subtraction, multiplication and inversion in finite fields. For an efficient implementation of ECC, it is very important to carry out these operations faster using lesser resources. The in version operation consumes most of the time and more resources. The Itoh-Tsujii algorithm can be used to carry out the computation of multiplicative inverse by making use of Brauer addition chains in less time. This work presents an FPGA implementation of the multiplicative inversion for the key lengths of 194-, 233-, and 384- bits. A resource comparison for these key lengths is also made. This work uses Sunar-Koc multiplier for the finite field, GF(2 m ) multiplication.