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http://localhost:8080/xmlui/handle/123456789/1914| Title: | A Novel on chip LDO voltage regulator in 180nm |
| Authors: | Rao, Patri Sreehari Krishnaprasad, K.S.R |
| Keywords: | LDO voltage voltage UMC 180 nano meter |
| Issue Date: | 2008 |
| Publisher: | 2008 International Conference on Electronic Design, ICED 2008 |
| Citation: | 10.1109/ICED.2008.4786685 |
| Abstract: | An on chip low drop out voltage regulator that employs a simple fast path and an elegant compensation scheme is presented in this paper. The novelty in this design is that the device parasitic capacitances are exploited for compensation at different loads. The proposed LDO is designed to provide a constant voltage of 1.2V and is implemented in UMC 180 nano meter CMOS technology. The voltage regulator presented improves stability even at lighter loads and enhances line and load regulation while providing reasonably good transient response. |
| Description: | NITW |
| URI: | http://localhost:8080/xmlui/handle/123456789/1914 |
| Appears in Collections: | Electronics and Communication Engineering |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| A_Novel_on_chip_LDO_voltage_regulator_in_180nm.pdf | 2.81 MB | Adobe PDF | View/Open |
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