Please use this identifier to cite or link to this item: http://localhost:8080/xmlui/handle/123456789/1829
Title: Reconfigurable Wireless Sensor Network Node based on NIOS core
Authors: Muralidhar, P.
Rao, C.B.Rama
Keywords: Wireless Sensor Network (WSN)
System on programmable chip (SOPC)
Issue Date: 2008
Publisher: Proceedings of the 4th International Conference on Wireless Communication and Sensor Networks, WCSN 2008
Citation: 10.1109/WCSN.2008.4772684
Abstract: Wireless sensor networks require the design of highly energy-efficient and yet flexible sensor nodes. The hardware flexibility required for dynamic adaptation is traditionally achieved with software based processors or Field programmable gate arrays (FPGAs), both of which come with significant energy, area and performance costs when compared to Application-specific integrated circuits (ASICs). In this paper, we propose a new HW/SW interface synthesis design method aiming at the Nios-based SOPC platform with a dynamically reconfigurable functional unit .The node was implemented on the Cyclone II FPGA and tested its functionality. Finally small network with four nodes has been developed and tested the node in real time environment for forest fire detection application. This paper also explores different approaches involved in the transfer of data from the test node to the base station and an energy efficient MAC protocol is used.
Description: NITW
URI: http://localhost:8080/xmlui/handle/123456789/1829
Appears in Collections:Electronics and Communication Engineering

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