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dc.contributor.authorAnandakrishna, Srinath-
dc.date.accessioned2024-11-25T06:46:26Z-
dc.date.available2024-11-25T06:46:26Z-
dc.date.issued2009-
dc.identifier.citation10.1109/ISCIT.2009.5341264en_US
dc.identifier.urihttp://localhost:8080/xmlui/handle/123456789/1735-
dc.descriptionNITWen_US
dc.description.abstractThe power consumption in digital systems is proportional to the number of bits used to represent the data. Therefore, the data is sometimes truncated to a lesser number of bits to reduce power consumption. This truncation introduces a DC bias in the signal which reduces system performance. If the original data is very close to the limits of representation in two’s complement format (i.e. (2n−1 − 1) or (−2n−1) in case of n-bit representation), addition of half the LSB value (using IEEE 754 Round to Nearest method to remove the DC bias) sometimes changes the sign of the sample value. This is similar to the effect of a full wave rectifier and therefore induces harmonics. A modified approach is proposed in which data that are close to the limits of representation are rounded to the highest or lowest possible number that can be represented after truncation without changing the sign of the data. This method was applied in sampling a sine wave in an AL4108 ADC board. It was found that the DC bias and the harmonics were removed.en_US
dc.language.isoenen_US
dc.publisher2009 9th International Symposium on Communications and Information Technology, ISCIT 2009en_US
dc.subjectTruncationen_US
dc.subjectBinaryen_US
dc.titleAn approximation-based truncation algorithm for binary data represented in two’s complement formaten_US
dc.typeOtheren_US
Appears in Collections:Electronics and Communication Engineering



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