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http://localhost:8080/xmlui/handle/123456789/1489Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Rao, Patri Sreehari | - |
| dc.contributor.author | Prasad, K. S. R. Krishna | - |
| dc.date.accessioned | 2024-11-13T09:14:30Z | - |
| dc.date.available | 2024-11-13T09:14:30Z | - |
| dc.date.issued | 2008 | - |
| dc.identifier.citation | 10.1109/ICED.2008.4786743 | en_US |
| dc.identifier.uri | http://localhost:8080/xmlui/handle/123456789/1489 | - |
| dc.description | NITW | en_US |
| dc.description.abstract | An ON chip LDO voltage regulator is presented in this paper with improved transient response. The sluggish nature of pass transistor mandates techniques to improve transient ripple and settling time against sudden load transients. An independent fast path is employed that facilitates the LDO to respond quickly to the sudden load variations. This enables reduction in the consequent ripple in the output voltage. The fast path is designed in such a way that it provides easy migration to the other process without much degradation in the performance. The proposed LDO is designed to provide a constant voltage of 1.2V and is implemented in UMC 1.8 mu CMOS technology. It features peak overshoot as low as 60 mV and very fast settling time of 6 musec. | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | International Conference on Electronic Design, ICED 2008 | en_US |
| dc.subject | ON Chip LDO | en_US |
| dc.subject | Voltage | en_US |
| dc.subject | Transient | en_US |
| dc.title | ON Chip LDO voltage regulator with improved transient response in 180nm | en_US |
| dc.type | Other | en_US |
| Appears in Collections: | Computer Science & Engineering | |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| ON_chip_LDO_voltage_regulator_with_improved_transient_response_in_180nm.pdf | 2.52 MB | Adobe PDF | View/Open |
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